The present invention relates to semiconductor devices and device fabrication and, more specifically, to device structures, fabrication methods, and design structures for a capacitor of a memory cell of a ferroelectric random access memory device.
Memory devices are utilized for data storage. Generally, a memory device includes a plurality of memory cells that can be placed in multiple states for digital data storage. One type of non-volatile memory device is a ferroelectric random access memory (FRAM), also known as ferroelectric random access memory (FeRAM). Even if not constantly supplied with electric power, a FRAM device preserves the stored data and, as such, is suitable for long-term data storage. In comparison with other types of memory devices, a FRAM device offers high-speed access, reduced power consumption, and is resistant to shock damage. Accordingly, a FRAM device may be used as a primary storage device for various electronic devices and equipment.
A FRAM device integrates a capacitor comprised of a layer of a ferroelectric material and a pass transistor in each memory cell. The capacitor of each memory cell stores logical data in the form of binary digits each of which has a value of “1” or “0” depending on the polarization state of the ferroelectric material. When a voltage is applied across the capacitor, a ferroelectric material of the capacitor is polarized according to the direction of an electric field. The applied voltage must exceed a threshold voltage capable of causing a change in the polarization state in the particular ferroelectric material. To read data stored in the memory cell, a voltage is applied between both electrodes of the capacitor to cause a potential difference across the ferroelectric material and thereby excite charge transport on a bit line. The state of the logical data stored in the memory cell is sensed as a change in the bit line current.
Device structures, fabrication methods, and design structures are needed for a capacitor of a memory cell of a FRAM device.